Abstract




 
   

IJE TRANSACTIONS A: Basics Vol. 28, No. 10 (October 2015) 1447-1454   

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  SYMMETRICAL, LOW-POWER, AND HIGH-SPEED 1-BIT FULL ADDER CELLS USING 32NM CARBON NANOTUBE FIELD-EFFECT TRANSISTORS TECHNOLOGY (TECHNICAL NOTE)
 
M. H. Shafiabadi and Y. Safaei Mehrabani
 
( Received: August 19, 2015 – Accepted: October 16, 2015 )
 
 

Abstract    Carbon nanotube field-effect transistors (CNFETs) are a promising candidate to replace conventional metal oxide field-effect transistors (MOSFETs) in the time to come. They have considerable characteristics such as low power consumption and high switching speed. Full adder cell is the main part of the most digital systems as it is building block of subtracter, multiplier, compressor, and other larger circuits. Therefore, it has a direct impact on the overall performance of the entire digital system. In this paper, we have presented two novel full adder cells using both capacitive threshold logic (CTL) and path transistor logic (PTL). The proposed cells have two symmetrical and identical modules to provide Sum and output carry (Cout). Intensive simulations using Synopsys HSPICE tool are run to evaluate the performance metrics of the proposed cells against some state-of-the-art full adders. Simulations are carried out in the presence of varying power supplies, temperatures, and output loads. Moreover, since process variations are a concern at the manufacturing stage of integrated circuits, we have performed Monte Carlo transient analysis to study the robustness of the proposed cells against diameter variations of carbon nanotubes (CNTs). Simulation results demonstrate that the proposed cells outperform their counterparts and exhibit reasonable results.

 

Keywords    Nanoelectronic, CNFET, Full Adder, CTL, PTL, Low-Power, High-Speed;

 

چکیده    ترانزیستورهای اثر میدان نانو لوله کربنی (CNFETs) احتمال زیادی دارند تا در آینده جایگزین ترانزیستورهای کلاسیک اثر میدان فلز اکسید (MOSFETs) شوند. آنها دارای مشخصات قابل توجهی همچون مصرف توان پایین و سرعت سوئیچینگ بالا می باشند. سلول تمام جمع کننده از آنجایی که هسته تفریق کننده، ضرب کننده، فشرده کننده و سایر مدارهای بزرگتر می باشد مهمترین بخش اغلب سیستم های دیجیتال می باشد. بنابراین تاثیر مستقیم بر روی کارایی کل سیستم دیجیتال دارد. در این مقاله، با استفاده از منطق آستانه خازنی (CTL) و منطق ترانزیستور عبور (PTL) دو عدد سلول تمام جمع کننده نوین ارائه شده است. سلول های ارائه شده دارای دو عدد ماژول یکسان و متقارن برای تولید سیگنال مجموع و رقم نقلی (Cout) می باشند. با استفاده از ابزار Synopsys HSPICE شبیه سازی های جامعی به منظور ارزیابی پارامترهای سلول های ارائه شده در برابر برخی از روش های نوین انجام شده است. شبیه سازی ها در حضور منبع تغذیه متغیر، دما، و بار خروجی انجام شده اند. علاوه بر این، از آنجایی که تغییرات فرآیند ساخت در مرحله تولید جزو نگرانی های اصلی می باشد، به منظور بررسی مقاومت سلول های ارائه شده در برابر تغییرات قطر نانو لوله های کربنی (CNTs) از تحلیل مونتو کارلو استفاده شده است. نتایج شبیه سازی تصدیق می نمایند که سلول های ارائه شده نسبت به رقیبان خود پیشی گرفته و نتایج منطقی را نشان می دهند.

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