IJE TRANSACTIONS C: Aspects Vol. 30, No. 6 (June 2017) 851-858    Article in Press

downloaded Downloaded: 117   viewed Viewed: 1505

G. Sridhar, P. SatishKumar and M. Sushama
( Received: September 07, 2016 – Accepted in Revised Form: March 10, 2017 )

Abstract    This paper presents a novel topology of single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge. The proposed topology can produce higher output voltage levels by connecting dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which helps in reduction of the cost, size, and weight. The proposed topology consumes low power therefore improves the efficiency of the converter. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity.


Keywords    Multi-level Inverter, Series-Parallel switches, Isolated DC Sources, Phase disposition (PD) PWM.


چکیده    اين مقاله توپولوژی نوينی از يک اينورتر چند طبقه تک فاز برای کاربرد های توان کم و زياد را ارائه می دهد که از يک مدار توليد کننده پلاريته و پلH تشکيل شده است. توپولوژی ارائه شده می تواند با اتصال سری و موازی منابع ولتاژ DC سطوح ولتاژ بالاتررا ايجاد کند. اين توپولوژی کمترين تعداد افزاره های الکترونيک قدرت را بکار می گيرد که به کاهش هزينه، اندازه و وزن کمک می کند، توان کمی مصرف می کند و بنابراين راندمان مبدل را بهبود می بخشد. پالس های سوئيچينگ با استفاده از روش مدوله سازی پهنای پالس PD ايجاد می شود. سر انجام موثر بودن توپولوژی ارائه شده با ابزار نرم افزار MATLAB/SIMULINK درستی سنجی شده است.نمونه سخت افزاری اينورتر7طبقهنا متقارن آماده شده تاتاثير و اعتبار توپولوژی ارائه شده را پشتيبانی کند.


1.      Masaod, A., Wooiping, H., Mekhilf, s. and Belkamel, H. O., "A new single phase five level inverter employing space vector current control", Electric Power Components and Systems,  Vol. 42, No. 11, (2014), 1121-1130.

2.      Mubashwar, M., Mekhilef, S. and Mahrous, A., "Three-phase hybrid multilevel inverter with less power electronic components using space vector", IET Power Electron.,  Vol. 7, No. 5, (2014), 1256-1265.

3.      Gupta, K. and Jain, S., "Topology for multilevel inverters to attain maximum number of levels from given dc sources", IET Power Electronics,  Vol. 5, No. 4, (2012), 435-446.

4.      Gautam, S. P., Kumar, L. and Gupta, S., "Hybrid topology of symmetrical multilevel inverter using less number of devices", IET Power Electronics,  Vol. 8, No. 11, (2015), 2125-2135.

5.      Sridhar, G., Kumar, P. S. and Sushama, M., "A novel generalized topology for multi-level inverter with switched series-parallel dc sources", Indonesian Journal of Electrical Engineering and Computer Science,  Vol. 4, No. 1, (2016).

6.      Taallah, A., Masaoud, A., wooiping, H. and mekhilef, s., "Novel configuration for multilevel dc link  five level three phase inverter", IET Power Electronics,  Vol. 7, No. 12, (2014), 3052-3061.

7.      Babaei, E., Kangarlu, M. F. and Hosseinzadeh, M. A., "Asymmetrical multilevel converter topology with reduced number of components", IET Power Electronics,  Vol. 6, No. 6, (2013), 1188-1196.

8.      Babaei, E., Alilu, S. and Laali, S., "A new general topology for cascaded multilevel inverters with reduced number of components based on developed h-bridge", IEEE Transactions on Industrial Electronics,  Vol. 61, No. 8, (2014), 3932-3939.

9.      Mohammadreza, D., "Analysis of different topologies of multilevel inverters", Masterís thesis, Division of electric power engineering, Chalmers university of technology, Goteborg, Sweden, (2010).

10.    Babaei, E., Sheermohammadzadeh, S. and Sabahi, M., "Improvement of multilevel inverters topology using series and parallel connections of dc voltage sources", Arabian Journal for Science and Engineering,  Vol. 39, No. 2, (2014), 1117-1127.

11.    Hinago, Y. and Koizumi, H., "A single-phase multilevel inverter using switched series/parallel DC voltage sources", IEEE Transactions on Industrial Electronics,  Vol. 57, No. 8, (2010), 2643-2650.

12.             Gupta, K. K., Ranjan, A., Bhatnagar, P., Sahu, L. K. and Jain, S., "Multilevel inverter topologies with reduced device count: A review", IEEE Transactions on Power Electronics,  Vol. 31, No. 1, (2016), 135-151.

International Journal of Engineering
E-mail: office@ije.ir
Web Site: http://www.ije.ir