Abstract




 
   

IJE TRANSACTIONS B: Applications Vol. 30, No. 8 (August 2017) 1126-1133   

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  BIT SWAPPING LINEAR FEEDBACK SHIFT REGISTER FOR LOW POWER APPLICATION USING 130NM COMPLEMENTARY METAL OXIDE SEMICONDUCTOR TECHNOLOGY (TECHNICAL NOTE)
 
N. Binti Mohd, F. Choong, M. Bin Ibne, N. Kamal and T. Badal
 
( Received: March 04, 2016 – Accepted in Revised Form: July 07, 2017 )
 
 

Abstract    Bit swapping linear feedback shift register (BS-LFSR) is employed in a conventional linear feedback shirt register (LFSR) to reduce its power dissipation and enhance its performance. In this paper, an enhanced BS-LFSR for low power application is proposed. To achieve low power dissipation, the proposed BS-LFSR introduced the stacking technique to reduce leakage current. In addition, three different architectures to enhance the feedback element used in BS-LFSR was explored. The pass transistor merged with transistor stack method yielded a better reduction in power dissipation compared to pass transistor design and NAND gate design. The BS-LFSR was designed in Mentor Graphic TSMC Design Kit Environment using 130nm complementary metal oxide semiconductor (CMOS) technology. The proposed 4-bit BS-LFSR achieved an active area of 1241.1588um2 and consumed only 53.8844nW with total power savings of 19.43%. The proposed design showed superiority when compared with the conventional LFSR and related work in reducing power dissipation and area.

 

Keywords    bit swapping linear feedback shift register (BS-LFSR), stacking technique, low power

 

چکیده    شيفت رجيستر با فيدبک خطی به صورت جابجايی بيت (Bit Swapping) BS-LFSR در يک شيفت رجيستر با فيد بک خطی متعارف بکار گرفته شده است تا تلفات توان آن را کاهش دهد و کارکرد آن را بهبود بخشد. در اين مقاله يک BS-LFSR بهبود يافته به منظورکاربردتوان پایین پيشنهاد شده است. برای دست يافتن به تلفات پایین، BS-LFSR ارائه شده روش stacking را معرفی می کند تا جريان نشتی را کاهش دهد.ادغام ترانزيستور passباروش ترانزيستورstack کاهش توان تلف شده بهتری را در مقايسه با طرح ترانزیستور passو طرح گیت NAND بدست داده است.BS-LFSR در محيط کیت طراحی Mentor Graphic-TSMC با استفاده از فناوریnm CMOS130صورت گرفته است. BS-LFSR چهاربيتی پیشنهادی به مساحت فعال m215/1241 رسیده و فقط nW8844/53 و صرفه جویی توانی معادل 43/19% مصرف کرده است. طرح پیشنهادی در مقایسه با LFSRمتعارف و کارکرد مربوط از نظر کاهش تلفات و مساحت، برتری نشان می دهد.

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